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Old 7th February 2015
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Originally Posted by J# Minor View Post
I don't have a complete picture of this yet, but I'm working on it.

My research suggests (i.e. not definite yet) that the 87C52 paints the splash screen on startup, probably without help from the ColdFire host processor. If you don't see the splash screen, the problem likely is somewhere between the 87C52 and the LCD.
If this is correct, this is quite interesting as my experience in programming 8051-style processors was somewhat limited to character displays, not graphical displays. But as you say below, the LCD is still setup in a grid format, just more points to be programmed rather than alphanumeric characters. Therefore, I suppose it is indeed possible for the 87C52 to handle all graphics.

In order to prove that the 87C52 can do at least the splash screen, it may come to the point to remove the main ribbon cable, and power the Front Panel Left PCB using a desktop power supply and see what happens.

The startup sequence I was actually looking for was much more simple--more external behavior rather than internal. I was merely interested, as a normal user would experience, in what happens when the main power switch is turned on. In other words, the splash screen pops up, go away, and the lights come on. But getting more in depth with the internal events would certainly be more useful. Because I can't see anything on the LCD, I am not 100% sure of what's really happening. So the goal was to confirm that I didn't need to press a soft button or other key to continue, so to speak.

Originally Posted by J# Minor View Post
Mostly. The host processor talks to the 87C52 via an internal serial line at ~152 Kbps. The protocol consists of short commands, like "clear display" and "draw this text at these coordinates". I haven't discovered yet which chip handles the graphical icons. So far, I haven't found a "draw this bitmap" command, but that doesn't mean it isn't there somewhere. With that said, I suspect it is more of a "draw icon #n at these coordinates" command.
I assume this serial connection using the RXD and TXD ports? I will need to check those ports for action.

Originally Posted by J# Minor View Post
Both the bootloader and OS binaries have a section of Intel HEX format at the end, which probably is intended to be loaded onto the 87C52. I don't know if it is code or data (perhaps bitmap graphics), or when it is loaded, but it is there.
Perhaps not. The 87C52 used in the A6 (P87C52UBBB) is a one-time-programmable device. Any internal flash (8K) would be programmed once, most likely from the factory, if needed. But as far as I can tell at this point, the 87C52 is "forced" to read "external", as resistor R42 exists and it is tying EA (external access enable) low. This permanently has the 87C52 read the EPROM chip for any code and load it into internal RAM (256x8) for use.

And the EPROM chip cannot be reprogrammed without being erased with UV light. These things are solid. The reason why Alesis probably chose a 1986-vintage UV-erasable EPROM chip was to eliminate the risk of an erasure.

Pulling the code off the EPROM would be easy and guarantee life after death for the Andromeda, at least for the Front Panel Left board. Any chip programmer could do it. The EPROM is easy. On the other hand, the SMD flash chip is the problem.

On a side note, I love 8051 microcontrollers! I haven't programmed one for quite some time, but I am quite familiar with the hardware and internal functions.

Originally Posted by J# Minor View Post
From wikipedia: Solid state media – such as EPROMs, flash memory and other solid-state drives – stores data using electrical charges, which can slowly leak away due to imperfect insulation. The chip itself is not affected by this, so re-programming it once per decade or so will prevent data decay.
So far, I don't think any user has managed to dump or reprogram the entire A6 flash. It's plausible that it could be done with the right equipment, without removing the flash chip from the board — it's just that no one has tried yet. There are several interested people, so that might change soon.
Yeah, I suppose any programmable device can lose it's programming over time. I would think, however, that it is quite rare. However, I always thought that EPROM's and other "flash" based devices are physically altered when programmed. Take for example the UV-erasable EPROM device. That's no electrical charge; the UV light is physically "resetting" the silicon transistors.

I hope that things turn around for the Andromeda. I am willing to contribute to the cause. I think it's absolutely ridiculous that a behemoth synthesizer is put out to pasture and left to die.

Originally Posted by J# Minor View Post
It says that if the chip an ICSI brand, replace it with ISSI brand.
I tried looking up information on ICSI brand chips, and couldn't find anything. Something tells me that ISSI and ICSI is one in the same, like ISSI bought out ICSI a long time ago and nobody cared to notice. The chips on my main board, revision 'B', appear to be ICSI.

Originally Posted by J# Minor View Post
If anyone knows, they aren't talking.
This is a big part of the problem. The A6 doesn't have a snowball's chance in Hell unless we all compile data and get working on a solution. Hoarding parts to the point of unavailability is not the solution. It would be wonderful if Alesis/Numark realized the "cult status" of this machine and contributed as well, supplying HEX code for reprogramming future flash ROMS and EPROMS.

Overall, I sense there is a certain fear of the Andromeda--a fear of the inevitable and a fear of disturbing the sleeping beast. Is that the reason for the "cult status?" Is the cult status to worship the Andromeda while it dies a slow death?

J# Minor, I appreciate your contribution to this thread. Thank you! I will be taking knowledge from your post and putting it towards my troubleshooting efforts.

Originally Posted by plaid_emu View Post
Jesus! Reading this thread makes me want to sell all my gear while it's working and go 100% ITB.
Now let's not get foolish!

Last edited by M.Retra; 7th February 2015 at 06:20 PM.. Reason: More information...