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Does FPGA suggest you can add significant features later?
Old 16th December 2019
  #1
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Does FPGA suggest you can add significant features later?

Hello

Does the FPGA design in the Super 6 suggest that it has a greater potential for updates or new features than more fixed hardware designs? I suspect that UDO would be against endless feature creep, but either features UDO considered but didn’t get implemented or good user suggested features might have some opportunity to be implemented? UDO might already have an earful of ideas about future features as I suspect most manufacturers do, but the FPGA might provide more potential for changes.
Old 17th December 2019
  #2
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Hiya!

Yes, we are using about 60% of the FPGA for the Super 6. That means there is massive scope for refinement. We are also only using about 30% CPU for housekeeping.

One thing we are really considering is to have dynamic waveforms, akin to wavetables that are non-static/modulatable in multiple dimensions. I don't want to promise too much now until we've sounded it out but in answer to your questions there is lots of unfulfilled potential, probably more so than in most commercial instruments.

This is largely by accident as we just tipped over the designed FPGA threshold and had to go to a bigger device with twice the resources. Cost us a packet but does allow for future stuff, and not just trivial stuff.
Old 17th December 2019 | Show parent
  #3
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Quote:
Originally Posted by George Hearn View Post
Hiya!

Yes, we are using about 60% of the FPGA for the Super 6. That means there is massive scope for refinement. We are also only using about 30% CPU for housekeeping.

One thing we are really considering is to have dynamic waveforms, akin to wavetables that are non-static/modulatable in multiple dimensions. I don't want to promise too much now until we've sounded it out but in answer to your questions there is lots of unfulfilled potential, probably more so than in most commercial instruments.

This is largely by accident as we just tipped over the designed FPGA threshold and had to go to a bigger device with twice the resources. Cost us a packet but does allow for future stuff, and not just trivial stuff.
do you also use fpga's for summing?
Old 18th December 2019
  #4
could this (hypothetically) mean even something like smooth wavetable scanning?

is there enough processing juice left to pull something like that off ?



thanks
Old 18th December 2019
  #5
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George Hearn's Avatar
 

yes most certainly
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