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Originally Posted by Casey  And what about those pesky allpass filters that like to read AND write at both ends.  |
If your allpass is in-line (ie. one big memory loop and not several segments that are kept separate), then you should not need to read and write both ends simultaneously. If you consider the input to an allpass as coming from somewhere else (say, the end of another delay line that is totally separate), and consider the output as going to somewhere else (the start of another delay line that is totally separate), then you need to read feedback from the end of the allpass, write to the start of the allpass, and write the output to the head of its own delay line. You will waste some SDRAM this way, but SDRAM's pretty cheap and there's lots of it. Provided that there is at least one transfer block size of empty space in the SDRAM between delays, then there should not be an issue. Or am I missing something?