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Old 14th March 2010   #501
dale116dot7
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Joined: Dec 2003
Location: Calgary, Alberta
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Each delay segment has a defined start and stop, without pseudo-randomly spaced taps in the middle like in the loop-style algorithms (Griesinger/Dattorro). The output comes from a summing matrix at the end of the delay lines. In this arrangement, you can easily move the middle section of each delay out into slow RAM, so long as you can write the head and and read the tail efficiently (fast RAM). That should be relatively cheap to do (in processor cycles), should be a relatively easy operation (you can probably program a DMA controller to do the memory moves), and also should handle resizing the delays quite easily. If a delay line is longer than about 100 samples, you can burst the data into and out of the SDRAM, and if it's shorter, you just turn off the SDRAM copy and leave the delay in SRAM.

Alternatively, if all of the audio for a reverb would fit in about 90k of SRAM, it could all sit in SRAM, and the SDRAM would only be used for bulk delays - predelay or slapback echo, that kind of thing. But if you upsample, then the 90k would disappear quickly - that would be under a second of audio at 96k.
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